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upcount.vhd (411B)


      1 library ieee;
      2 use ieee.std_logic_1164.all;
      3 use ieee.std_logic_arith.all;
      4 use ieee.std_logic_unsigned.all;
      5 
      6 entity upcount is port (
      7 	clk: in std_logic;
      8 	rst: in std_logic;
      9 	q: inout std_logic_vector(1 downto 0)
     10 );
     11 end upcount;
     12 
     13 architecture behav of upcount is
     14 begin
     15 	process (clk, rst) begin
     16 		if (rst = '1') then
     17 			q <= "00";
     18 		elsif (rising_edge(clk)) then
     19 			q <= q + 1;
     20 		end if;
     21 	end process;
     22 end behav;