uni-assignments

University programming assignments
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mux2to1_tb.vhd (614B)

      1 entity mux2to1_tb is
      2 end mux2to1_tb;
      3 
      4 architecture tb of mux2to1_tb is
      5 
      6 signal a1, b1, s1, c1: bit;
      7 
      8 component mux2to1
      9 port (
     10         a, b, s: in bit;
     11         c: out bit
     12 );
     13 end component;
     14 
     15 begin
     16         m1: mux2to1 port map (
     17                 a => a1,
     18                 b => b1,
     19                 s => s1,
     20                 c => c1
     21         );
     22         process begin
     23                 a1 <= '1';
     24                 b1 <= '0';
     25                 s1 <= '1';
     26                 wait for 20 ps;
     27 
     28                 a1 <= '1';
     29                 b1 <= '0';
     30                 s1 <= '0';
     31                 wait for 20 ps;
     32         end process;
     33 end tb;