dec2to4en.vhd (430B)
1 library ieee; 2 use ieee.std_logic_1164.all; 3 4 entity dec2to4en is port ( 5 a: in std_logic_vector(1 downto 0); 6 en: in std_logic; 7 d: out std_logic_vector(3 downto 0) 8 ); 9 end dec2to4en; 10 11 architecture dataflow of dec2to4en is 12 begin 13 d(0) <= not a(0) and not a(1) and en; 14 d(1) <= a(0) and not a(1) and en; 15 d(2) <= not a(0) and a(1) and en; 16 d(3) <= a(0) and a(1) and en; 17 end dataflow;