uni

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ha.vhd (215B)


      1 library ieee;
      2 use ieee.std_logic_1164.all;
      3 
      4 entity ha is port (
      5         a, b: in bit;
      6         s, c: out bit
      7 );
      8 end ha;
      9 
     10 architecture dataflow of ha is
     11 begin
     12         s <= a xor b;
     13         c <= a and b;
     14 end dataflow;