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mux_triple_2to1.vhd (318B)


      1 library ieee;
      2 use ieee.std_logic_1164.all;
      3 
      4 entity mux_triple_2to1 is port (
      5         a, b: in std_logic_vector(2 downto 0);
      6         s: in std_logic;
      7         d: out std_logic_vector(2 downto 0)
      8 );
      9 end mux_triple_2to1;
     10 
     11 architecture dataflow of mux_triple_2to1 is
     12 begin
     13         d <= a when s = '1' else b;
     14 end dataflow;