ff.vhd (208B)
1 entity ff is port ( 2 d: in bit; 3 clk: in bit; 4 q: out bit 5 ); 6 end ff; 7 8 architecture behav of ff is 9 begin 10 process (clk) begin 11 if (clk 'event and clk = '1') then 12 q <= d; 13 end if; 14 end process; 15 end behav;
uniUniversity stuff | |
git clone git://git.margiolis.net/uni.git | |
Log | Files | Refs | README | LICENSE |