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mux2to1.vhd (243B)


      1 library ieee;
      2 use ieee.std_logic_1164.all;
      3 
      4 entity mux2to1 is port (
      5 	a: in std_logic;
      6 	b: in std_logic;
      7 	s: in std_logic;
      8 	d: out std_logic
      9 );
     10 end mux2to1;
     11 
     12 architecture dataflow of mux2to1 is
     13 begin
     14 	d <= a when s = '1' else b;
     15 end dataflow;