sign_ext.vhd (370B)
1 library ieee; 2 use ieee.std_logic_1164.all; 3 4 entity sign_ext is port ( 5 instr: in std_logic_vector(15 downto 0); 6 sign_ex: out std_logic_vector(31 downto 0) 7 ); 8 end sign_ext; 9 10 architecture dataflow of sign_ext is 11 begin 12 -- Check the MSB to determine the sign. 13 sign_ex <= x"0000" & instr when instr(15) = '0' else 14 x"ffff" & instr when instr(15) = '1'; 15 end dataflow;