sign_ext_tb.vhd (600B)
1 library ieee; 2 use ieee.std_logic_1164.all; 3 4 entity sign_ext_tb is 5 end sign_ext_tb; 6 7 architecture behav of sign_ext_tb is 8 9 signal s_instr: std_logic_vector(15 downto 0); 10 signal s_sign_ex: std_logic_vector(31 downto 0); 11 12 component sign_ext is port ( 13 instr: in std_logic_vector(15 downto 0); 14 sign_ex: out std_logic_vector(31 downto 0) 15 ); 16 end component; 17 18 begin 19 uut: sign_ext port map ( 20 instr => s_instr, 21 sign_ex => s_sign_ex 22 ); 23 24 process begin 25 s_instr <= x"0010"; 26 wait for 250 ns; 27 28 s_instr <= x"1001"; 29 wait for 250 ns; 30 31 s_instr <= x"80a0"; 32 wait for 250 ns; 33 end process; 34 end behav;