fa.vhd (317B)
1 library ieee; 2 use ieee.std_logic_1164.all; 3 4 entity fa is port ( 5 a: in std_logic; 6 b: in std_logic; 7 cin: in std_logic; 8 s: out std_logic; 9 cout: out std_logic 10 ); 11 end fa; 12 13 architecture dataflow of fa is 14 begin 15 s <= a xor b xor cin; 16 cout <= (a and b) or (cin and (a xor b)); 17 end dataflow;